The present invention relates to a holding unit, a processing apparatus and a holding method of a substrate, and more particularly to a holding unit, a processing apparatus and a holding method for processing a substrate, such as a semiconductor wafer, that requires a high degree of flatness and cleanliness.
Although aluminum or an aluminum alloy has been commonly used as a material for forming a wiring circuit on a semiconductor substrate, there has arisen a demand in association with the improved density in integration of semiconductor devices that a material having higher conductivity should be used as the wiring material. To meet that demand, a method has been suggested, in which first, a plating treatment is applied to a surface of a semiconductor substrate on which a circuit pattern groove and/or hole has been formed, so as to fill the pattern groove and/or hole with Cu (copper) or Cu-alloy, and second, the Cu or Cu-alloy is removed from the surface excluding the filled portions, thus forming circuit wiring.
To form this circuit wiring, first, a conductive layer is formed on the surface of the semiconductor substrate with a semiconductor element formed thereon. Second, an insulating film made of SiO2 is deposited on the conductive layer. Third, contact holes and grooves for wiring are formed thereon by the use of lithography etching technology. Fourth, a barrier layer made of TiN or the like is formed thereon. Finally, a seeding layer is formed on the barrier layer so as to function as a feeding layer for the electrolytic plating.
By further applying Cu-plating to the top surface of the semiconductor substrate, the contact holes and/or the grooves of the semiconductor substrate can be filled with Cu while the Cu-plating film layer is deposited on the insulating film. Then, the Cu-plating film layer on the insulating film and the barrier layer are removed by chemical mechanical polishing (CMP), so that the surface of the Cu-plating film layer filling the contact holes and the grooves for wiring can be made approximately flush with the surface of the insulating film. Thereby, the wiring configuration consisting of a copper plating film layer is formed.
In this regard, it is to be noted that since the barrier layer and the seeding layer have been formed respectively to cover almost the entire surfaces of the insulating film or the barrier layer, there is a possibility that the copper film of the seeding layer will exist on a bevel (a circumferential portion) of the semiconductor substrate and/or that the copper forms a film and remains on an inner edge of the bevel (the circumferential portion) of the semiconductor substrate.
In practice, copper must be completely removed from the substrate; otherwise, there is a possibility that any copper that does remain, in certain semiconductor manufacturing processes such as an annealing process, for example, will readily diffuse into the insulating film, which may cause a deterioration in its insulating ability, or insufficient adhesion to a film to be formed subsequently, resulting in flaking.